Avoiding Priority Processing - 2022.1 English

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID
UG901
Release Date
2022-06-06
Version
2022.1 English

The case statement in the previous coding example evaluates the values of input sel in priority order.

To avoid priority processing:

°Use a parallel-case Verilog attribute to ensure parallel evaluation of the input sel.

°Replace the case statement with:

   (* parallel_case *) case(sel)