Assigning an Initial Value to a Register - 2022.1 English

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID
UG901
Release Date
2022-06-06
Version
2022.1 English

Assign a set/reset (initial) value to a register.

Assign the value to the register when the register reset line goes to the appropriate value. See the following coding example.

When you assign the initial value to a variable:

°The value is implemented as a Flip-Flop, the output of which is controlled by a local reset.

°The value is carried in the Verilog file as an FDP or FDC Flip-Flop.