VHDL Sequential Processes Without a Sensitivity List - 2022.1 English

Vivado Design Suite User Guide: Synthesis (UG901)

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2022.1 English

Vivado synthesis allows the description of a sequential process using a wait statement. The sequential process is described without a sensitivity list.

The wait statement is the first statement and the condition in the wait statement describes the sequential logic clock.


IMPORTANT:   The same sequential process cannot have both a sensitivity list and a wait statement, and only one wait statement is allowed.