Vivado synthesis supports the following SystemVerilog operators:
•Assignment operators (=, +=, -=, *=, /=, %=, &=, |=, ^=, <<=, >>=, <<<=, >>>=)
•Unary operators (+, -, !, ~, &, ~&, |, ~|, ^, ~^, ^~)
•Increment/decrement operators (++, --)
•Binary operators (+, -, *, /, %, ==, ~=, ===, ~==, &&, ||, **, <, <=, >, >=, &, |, ^, ^~, ~^, >>, <<, >>>, <<<)
Note: A**B is supported if A is a power of 2 or B is a constant.
•Conditional operator (? :)
•Concatenation operator ({...})