Compiling and Simulation Using the Makefile - 2023.2 English

Vitis Libraries
Release Date
2023-12-20
Version
2023.2 English

A Makefile is included within each library element. It is located in the L2/tests/aie/<library_element> directory.

  • Prerequisites:
source <your-Vitis-install-path>/lin64/Vitis/HEAD/settings64.sh
source <your-XRT-install-path>/xbb/xrt/packages/setup.sh
export PLATFORM=<your-platform-repo-install-path>
  • Environment Variables:

For embedded devices like vck190, env variable SYSROOT, EDGE_COMMON_SW and PERL need to be set first. For example,

export SYSROOT=< path-to-platform-sysroot >
export EDGE_COMMON_SW=< path-to-rootfs-and-Image-files >
export PERL=<path-to-perl-installation-location >

To perform a x86 compilation/simulation, run:

make run TARGET=x86sim

To perform a aiesim compilation/simulation, run:

make run TARGET=aiesim

List of all makefile targets:

make all TARGET=<x86sim/aiesim/> PLATFORM=<FPGA platform>
    Command to generate the design for specified Target and Shell.

make run TARGET=<x86sim/aiesim/> PLATFORM=<FPGA platform>
    Command to run application in emulation.

make xclbin TARGET=<x86sim/aiesim/> PLATFORM=<FPGA platform>
    Command to build xclbin application.

make host TARGET=<x86sim/aiesim/>
    Command to build host application.

make clean
    Command to remove the generated non-hardware files.

make cleanall TARGET=<x86sim/aiesim/>
    Command to remove all the generated files.