Profiling - 2024.2 English - XD160

Vitis Libraries

Document ID
XD160
Release Date
2024-11-29
Version
2024.2 English

The hash group aggregate design is validated on an AMD Alveo™ U280 board at a 200 MHz frequency. The hardware resource utilizations are listed in the following table.

Table 31 Table 1 Hardware Resources for Hash Group Aggregate
Name LUT BRAM URAM DSP
Platform 202971 427 0 10
hash_aggr_kernel 184064 207 256 0
User Budget 1099749 1589 960 9014
Percentage 16.74% 13.03% 26.67% 0

The performance is shown below. In above test, table Lineitem has two columns and 6000000 rows. This means that the design takes 34.702 ms to process 45.78 MB data, so it achieves 1.29 Gb/s throughput.