The base mode of SSR is driven by the use of the TP_SSR``template parameter.
The ``TP_SSR parameter allows a trade of performance for resource use in the form of tiles used.
When used, a number of TP_SSR input phases and a number of TP_SSR output paths will be created.
An array of TP_SSR^2 FIR sub-graphs will be created to connect the input phases and output paths.
Input data samples are distributed across the input phases in a round-robin, sample-by-sample mechanism where each input phase processes a fraction of the input samples, i.e. TP_INPUT_WINDOW_VSIZE / TP_SSR. More details in: Super Sample Rate - Sample to Port Mapping.
Coefficients are distributed in such way that each output path consists of all the FIRs coefficients, but each FIR sub-graph in any given output path is only configured to operate on a fraction of the FIR length, i.e., operates on TP_FIR_LEN / TP_SSR number of coefficients.
As a result, each FIR sub-graph operates on a fraction of coefficients and a fraction of the data, giving an overall increased performance.
In addition, each FIR sub-graph can be further split into multiple FIR kernels with the use of a cascade interface, which is driven by the TP_CASC_LEN template parameter.
For example, a FIR with TP_SSR = 4 and TP_CASC_LEN = 2 will create a kernel structure presented as follows, in Internal structure of FIR with TP_SSR = 4 and TP_CASC_LEN = 2.
Figure 29 Internal structure of FIR with TP_SSR = 4 and TP_CASC_LEN = 2