Restricted Memory Version - 2024.1 English

Vitis Libraries

Release Date
2024-08-06
Version
2024.1 English
To use restricted memory version, your input matrix sizes must be a multiple of certain configuration values that are used to build the FPGA bitstreams. Also, host memory is encouraged to be 4k aligned when using the restricted memory version. Compared to the default memory version, even though there are requirements on the matrix sizes, restricted memory version can save extra memory copy in the host side.