Implementation on FPGA - 2024.2 English

Vitis Libraries
Document ID
XD160
Release Date
2024-11-29
Version
2024.2 English

Three different modes are supported in this implementation: CFB1, CFB8, and CFB128. The length of the text to be processed in one iteration corresponding to specific mode. CFB1 is 1 bit per iteration, CFB8 is 8 bits per iteration, and CFB128 is 128 bits per iteration.

Attention

The bit-width of the interfaces are shown as follows:

  plaintext ciphertext cipherkey IV
CFB1-DES 64 64 64 64
CFB1-AES128 128 128 128 128
CFB1-AES192 128 128 192 128
CFB1-AES256 128 128 256 128
CFB8-DES 64 64 64 64
CFB8-AES128 128 128 128 128
CFB8-AES192 128 128 192 128
CFB8-AES256 128 128 256 128
CFB128-DES 64 64 64 64
CFB128-AES128 128 128 128 128
CFB128-AES192 128 128 192 128
CFB128-AES256 128 128 256 128

The algorithm flow chart is shown as follows, and the length of the text is denoted as ‘s’:

algorithm flow chart of CFB

As seen from the chart, the encryption part of each CFB mode has loop-carried dependency, which is enforced by the algorithm, the input block of each iteration (except for iteration 0) needs a feedback data from its last iteration. Thus, the initiation interval (II) of each CFB encryption mode cannot achieve an II = 1. However, the decryption part of each CFB mode has no dependencies, so that it can achieve an II = 1.