| Name |
LUT |
LUTAsMem |
REG |
BRAM |
URAM |
DSP |
|---|
| Platform |
- 161585
- [13.67%]
|
- 19362
- [ 3.27%]
|
- 234662
- [ 9.92%]
|
- 320
- [14.81%]
|
- 0
- [ 0.00%]
|
- 7
- [ 0.10%]
|
| User Budget |
- 1020655
- [100.00%]
|
- 572478
- [100.00%]
|
- 2129818
- [100.00%]
|
- 1840
- [100.00%]
|
- 960
- [100.00%]
|
- 6833
- [100.00%]
|
| Used Resources |
- 44393
- [ 4.35%]
|
- 4269
- [ 0.75%]
|
- 49900
- [ 2.34%]
|
- 125
- [ 6.79%]
|
- 0
- [ 0.00%]
|
- 446
- [ 6.53%]
|
| Unused Resources |
- 976262
- [ 95.65%]
|
- 568209
- [ 99.25%]
|
- 2079918
- [ 97.66%]
|
- 1715
- [ 93.21%]
|
- 960
- [100.00%]
|
- 6387
- [ 93.47%]
|
| BinomialTreeKernel_1 |
- 44393
- [ 4.35%]
|
- 4269
- [ 0.75%]
|
- 49900
- [ 2.34%]
|
- 125
- [ 6.79%]
|
- 0
- [ 0.00%]
|
- 446
- [ 6.53%]
|
The hardware resources are listed in the preceding table. This is for the demonstration as configured by default (one engine), achieving a 300 MHz clock rate.
The number of engines in a build might be configured by the user. For an example build of eight engines, the following table shows the resources used:
| Name |
LUT |
LUTAsMem |
REG |
BRAM |
URAM |
DSP |
|---|
| Platform |
- 161579
- [13.67%]
|
- 19362
- [ 3.27%]
|
- 234660
- [ 9.92%]
|
- 320
- [14.81%]
|
- 0
- [ 0.00%]
|
- 7
- [ 0.10%]
|
| User Budget |
- 1020661
- [100.00%]
|
- 572478
- [100.00%]
|
- 2129820
- [100.00%]
|
- 1840
- [100.00%]
|
- 960
- [100.00%]
|
- 6833
- [100.00%]
|
| Used Resources |
- 334087
- [ 32.73%]
|
- 33438
- [ 5.84%]
|
- 355699
- [ 16.70%]
|
- 559
- [ 30.38%]
|
- 0
- [ 0.00%]
|
- 3568
- [ 52.22%]
|
| Unused Resources |
- 686574
- [ 67.27%]
|
- 539040
- [ 94.16%]
|
- 1774121
- [ 83.30%]
|
- 1281
- [ 69.62%]
|
- 960
- [100.00%]
|
- 3265
- [ 47.78%]
|
| BinomialTreeKernel_1 |
- 334087
- [ 32.73%]
|
- 33438
- [ 5.84%]
|
- 355699
- [ 16.70%]
|
- 559
- [ 30.38%]
|
- 0
- [ 0.00%]
|
- 3568
- [ 52.22%]
|