Systolic Array - 2023.2 English

Vitis Libraries

Release Date
2023-12-20
Version
2023.2 English

The architecture of the systolic array is implemented with L1 primitive function gemm. The size of the systolic array is defined via template parameters. In this library, the size is set according the external memory datawidth. For single-precision floating point GEMM and 512-bit DDR interface, the systolic array size is 16 x 16.