Revision History - 3.4 English

Versal Adaptive SoC CPM Mode for PCI Express Product Guide (PG346)

Document ID
PG346
Release Date
2024-05-30
Version
3.4 English

The following table shows the revision history for this document.

Section Revision Summary
05/30/2024 Version 3.4
Using the Provided Software and Drivers Added a note.
Performance Updated table.
Completer Completion Interface Updated.
Requester Request Interface Updated table.
Requester Request Interface Updated figure.
Configuration Control Interface Updated table.
AXI4-Stream Interface Description Added a note.
Requester Request Descriptor Formats Updated figure.
Customizing and Generating the CIPS IP Core for CPM4 Updated figures.
Customizing and Generating the CIPS IP Core for CPM5 Updated figures.
11/20/2023 Version 3.4
PCI Express Switch Port Use Mode Added new section.
Unsupported Features Added new section.
Managing Receive-Buffer Space for Inbound Completions Added new appendix.
Interrupt Request (IRQ) Routing and Programming for CPM4 Added new appendix.
Interrupt Request (IRQ) Routing and Programming for CPM5 Added new appendix.
Generating Simulation Example Design for CPM Added new appendix.
Link Training: 2-Lane, 4-Lane, 8-Lane, and 16- Lane Components Added new section.
Lane Reversal Added new section.
Migrating to CPM4 Updated section.
Migrating to CPM5 Updated section.
Tandem PCIe and DFx Configuration Example Design Added a note.
Performance Updated Key System Level Performance Parameters for PCIe Port 0 and Port 1 tables.
Completer Request Interface Updated Completer Request Interface Port Descriptions table.
Completer Request Interface Updated Completer Request Interface Port Descriptions (512-bit Interface) table.
Requester Request Interface Updated Requester Request Interface Port Descriptions (1024-bit Interface) table.
Configuration Management Interface Updated Configuration Management Interface Port Descriptions table.
Configuration Status Interface Updated Configuration Status Interface Port Descriptions table.
Configuration Control Interface Updated Configuration Control Interface Port Descriptions table.
Legacy Interrupt Interface Updated Legacy Interrupt Interface Port Descriptions table.
MSI Interrupt Interface Updated MSI Interrupt Interface Port Descriptions table.
MSI-X Interrupt Interface Updated MSI-X Interrupt External Interface Port Descriptions table.
Configuration Extend Interface Updated Configuration Extend Interface Port Descriptions table.
Configuration PASID Interface Updated Configuration PASID Interface Port Descriptions table.
Resets Updated section.
Configuring the CIPS IP Core Updated section.
Basic Tab Updated section.
GT Quad Locations Updated CPM4 GTY Locations table.
GTYP Quad and REFCLK Placements Updated section.
GTYP Quad and REFCLK Placements Updated section.
CPM5 GTYP Locations Updated section.
Implementing the HSDP-over-PCIe Example Design Added a note.
05/16/2023 Version 3.3
Performance Added a table footnote for Key System Level Performance Parameters for PCIe Port 0 table.
Configuration Space Added new tables.
Requester Request Interface Updated Requester Request Interface Port Descriptions (1024-bit Interface) table.
Configuration Status Interface Updated Configuration Status Interface Port Descriptions table.
Configuration Control Interface Updated Configuration Control Interface Port Descriptions table.
MSI Interrupt Interface Updated MSI Interrupt Interface Port Descriptions table.
MSI-X Interrupt Interface Updated MSI-X Interrupt External Interface Port Descriptions table.
GTYP Quad and REFCLK Placements Updated Allowable GTYP Transceiver Quad Placement table.
RESET Placements Updated.
11/16/2022 Version 3.3
Transmit Flow Control Interface Added new section.
Features Updated features.
Configuration Status Interface Updated Configuration Status Interface Port Descriptions table.
Completer Request Interface Updated Completer Request Interface Port Descriptions table.
Configuration Control Interface Updated Configuration Control Interface Port Descriptions table.
Configuring the CIPS IP Core Updated figures.
CPM4 GTY Locations Updated.
06/17/2022 Version 3.1
1024-bit Interfaces Added new section.
1024-Bit Completer Interface Added new section.
1024-Bit Requester Interface Added new section.
Migrating to CPM5 Added new section.
Features Updated.
Features Updated.
04/29/2022 Version 3.1
General updates Updated for Versal Premium ACAP support.
12/21/2021 Version 3.1
Limitations for CPM4 and CPM5 Updated.
CPM4 GTY Locations Updated.
11/09/2021 Version 3.0
General, and Customizing and Generating the CIPS IP Core for CPM4 Updated for CIPS IP version 3.0.
Minimum Device Requirements New information added.
Tandem Configuration New section added, and tandem configuration use case details updated throughout.
Limitations for CPM4 and CPM5 New information added.
04/29/2021 Version 2.1
Limitations for CPM4 and CPM5 Added topic to report known issues in the release.
01/08/2021 Version 2.1
Features Updated lane operations.
PCI Express Endpoint Use Modes Added the Tandem PROM and Tandem PCIe use modes (not supported in this release).
Port Descriptions Added new section.
Design Flow Steps Updated with new parameters throughout.
Migrating Added new appendix.
07/24/2020 Version 1.0
Initial AMD release. N/A