Requester Completion Descriptor Format - 3.4 English

Versal Adaptive SoC CPM Mode for PCI Express Product Guide (PG346)

Document ID
PG346
Release Date
2024-05-30
Version
3.4 English

The requester completion interface of the core sends completion data received from the link to the user application as AXI4-Stream packets. Each packet starts with a descriptor, and can have payload data following the descriptor. The descriptor is always 12 bytes long, and is sent in the first 12 bytes of the completion packet. When the completion data is split into multiple Split Completions, the core sends each Split Completion as a separate AXI4-Stream packet, with its own descriptor.

The format of the requester completion descriptor is illustrated in the following figure. The individual fields of the requester completion descriptor are described in the following table.

Figure 1. Requester Completion Descriptor Format
Table 1. Requester Completion Descriptor Fields
Bit Index Field Name Description
11:0 Lower Address

This field provides the 12 least significant bits of the first byte referenced by the request. The integrated block returns this address from its Split Completion Table, where it stores the address and other parameters of all pending Non-Posted requests on the requester side.

When the Completion delivered has an error, only bits [6:0] of the address should be considered valid.

This is a byte-level address.

For ATS translation requests, this field is reserved and implied to be zero.

15:12 Error Code

Completion error code.

These three bits encode error conditions detected from error checking performed by the integrated block on received Completions. Its encodings are:

  • 0000: Normal termination (all data received).
  • 0001: The Completion TLP is Poisoned.
  • 0010: Request terminated by a Completion with UR, CA, or CRS status.
  • 0011: Request terminated by a Completion with no data, or the byte count in the Completion was higher than the total number of bytes expected for the request.
  • 0100: The current Completion being delivered has the same tag of an outstanding request, but its Requester ID, TC, or Attr fields did not match with the parameters of the outstanding request.
  • 0101: Error in starting address. The low address bits in the Completion TLP header did not match with the starting address of the next expected byte for the request.
  • 0110: Invalid tag. This Completion does not match the tags of any outstanding request.
  • 1001: Request terminated by a Completion timeout. The other fields in the descriptor, except bit [30], the requester Function [55:48], and the tag field [71:64], are invalid in this case, because the descriptor does not correspond to a Completion TLP.
  • 1000: Request terminated by a Function-Level Reset (FLR) targeted at the Function that generated the request. The other fields in the descriptor, except bit [30], the requester Function [55:48], and the tag field [71:64], are invalid in this case, because the descriptor does not correspond to a Completion TLP.
28:16 Byte Count

These 13 bits can have values in the range of 0 – 4,096 bytes. If a Memory Read Request is completed using a single Completion, the Byte Count value indicates Payload size in bytes. This field must be set to 4 for I/O read Completions and I/O write Completions. The byte count must be set to 1 while sending a Completion for a zero-length memory read, and a dummy payload of 1 Dword must follow the descriptor.

For each Memory Read Completion, the Byte Count field must indicate the remaining number of bytes required to complete the Request, including the number of bytes returned with the Completion.

If a Memory Read Request is completed using multiple Completions, the Byte Count value for each successive Completion is the value indicated by the preceding Completion minus the number of bytes returned with the preceding Completion.

29 Locked Read Completion This bit is set to 1 when the Completion is in response to a Locked Read request. It is set to 0 for all other Completions.
30 Request Completed

The integrated block asserts this bit in the descriptor of the last Completion of a request. The assertion of the bit can indicate normal termination of the request (because all data has been received) or abnormal termination because of an error condition. The user logic can use this indication to clear its outstanding request status.

When tags are assigned, the user logic should not reassign a tag allocated to a request until it has received a Completion Descriptor from the integrated block with a matching tag field and the Request Completed bit set to 1.

31 T8 When 10b Tag Requester is enabled, this bit is to carry PCIe Tag[8]. This bit is reserved in all other cases.
42:32 Dword Count These 11 bits indicate the size of the payload of the current packet in Dwords. Its range is 0 - 1K Dwords. This field is set to 1 for I/O read Completions and 0 for I/O write Completions. The Dword count is also set to 1 while transferring a Completion for a zero-length memory read. In all other cases, the Dword count corresponds to the actual number of Dwords in the payload of the current packet.
45:43 Completion Status

These bits reflect the setting of the Completion Status field of the received Completion TLP. The valid settings are:

  • 000: Successful Completion
  • 001: Unsupported Request (UR)
  • 010: Configuration Request Retry Status (CRS)
  • 100: Completer Abort (CA)
47 T9 When 10-bit tags are enabled on the requester side, this field provides bit [9] of the PCIe tag associated with the Completion. This bit is reserved when 10-bit tags are disabled on the requester side.
46 Poisoned Completion This bit is set to indicate that the Poison bit in the Completion TLP was set. The data in the packet should be considered corrupted.
63:48 Requester ID PCI Requester ID associated with the Completion.
71:64 Tag PCIe Tag associated with the Completion.
87:72 Completer ID Completer ID received in the Completion TLP. (These 16 bits are divided into an 8-bit bus number, 5-bit device number, and 3-bit function number in the legacy interpretation mode. In the ARI mode, these 16 bits must be treated as an 8-bit bus number + 8-bit Function number.).
88 Reserved This bit is reserved.
91:89 Transaction Class (TC) PCIe Transaction Class (TC) associated with the Completion.
94:92 Attributes PCIe attributes associated with the Completion. Bit 92 is the No Snoop bit, bit 93 is the Relaxed Ordering bit, and bit 94 is the ID-Based Ordering bit.
95 Reserved This bit is reserved.