GTYP Quad and REFCLK Considerations - 3.4 English

Versal Adaptive SoC CPM Mode for PCI Express Product Guide (PG346)

Document ID
PG346
Release Date
2024-05-30
Version
3.4 English

In migration, the lane ordering for each controller configured for x16 or x8 link widths reverse within the GTYP quads accessible to each controller. For these designs, the lane reversal is transparent under the assumption that the lane reversal by the IP is used. REFCLK placements for x16 or x8 link widths do not change.

For designs using x4 or narrower link widths, the lane ordering is unchanged during migration. REFCLK placements also do not change.

Refer the provided placement tables. For additional migration support, contact your AMD representative.