Implementing the HSDP-over-PCIe Example Design - 3.4 English

Versal Adaptive SoC CPM Mode for PCI Express Product Guide (PG346)

Document ID
PG346
Release Date
2024-05-30
Version
3.4 English

HSDP-over-PCIe example design is provided for Vivado users to test the feature in the hardware with a Versal device development board. This section provides necessary instructions to generate the design, implement appropriate software, and begin running debug traffic across a PCIe link.

Note: The provided example design is for reference only; it might or might not comply with the requirements for a production design. Users are advised to perform extensive testing and verification before attempting to use in a production design.