Basic PCI Express Root Complex Use Case
The following figure shows a PCI Express Root Complex in the simplest form consisting of a PCI Express Root Port to an AXI4 bridge interfaced with the interconnect. The interconnect consists of an ArmĀ® based processor system (PS) containing most of the critical blocks such as CPU, memory controller and other important peripherals. One of the goals of this use case is to minimize Versal device soft logic requirements.
Note: Root port mode is not supported in QDMA0
and QDMA1 controllers at the same time. You can enable root port mode only in one
controller at a time.
Figure 1. Basic PCI Express Root Complex Use Case