References - 3.4 English - PG346

These documents provide supplemental material useful with this guide:

1. Control, Interface and Processing System LogiCORE IP Product Guide (PG352)
2. Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)
3. Versal Adaptive SoC Integrated Block for PCI Express LogiCORE IP Product Guide (PG343)
4. UltraScale+ Devices Integrated Block for PCI Express LogiCORE IP Product Guide (PG213)
5. Versal Adaptive SoC Technical Reference Manual (AM011)
6. Versal Adaptive SoC Register Reference (AM012)
7. Versal Adaptive SoC CPM CCIX Architecture Manual (AM016)
8. PCI Express Base Specification 4.0 (https://www.pcisig.com/specifications)
9. PCI Express Base Specification 5.0 (https://www.pcisig.com/specifications)
10. Cache Coherent Interconnect for Accelerators (CCIX) Transport Specification (available at http://www.ccixconsortium.com/; membership required).
11. Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
12. Vivado Design Suite User Guide: Designing with IP (UG896)
13. Versal Adaptive SoC System Software Developers Guide (UG1304)
14. Power Design Manager User Guide (UG1556)
15. Versal Architecture and Product Data Sheet: Overview (DS950)
16. Vivado Design Suite User Guide: Logic Simulation (UG900)
17. Versal Premium Series Data Sheet: DC and AC Switching Characteristics (DS959)
18. Vivado Design Suite User Guide: Dynamic Function eXchange (UG909)
19. Vivado Design Suite User Guide: Getting Started (UG910)
20. Versal Adaptive SoC Packaging and Pinouts Architecture Manual (AM013)
21. PIPE Mode Simulation Using Integrated Endpoint PCI Express Block in Gen2 x8 and Gen3 x8 Configurations (XAPP1184)