The configuration PASID interface is used to determine the enablement of the PASID per function status by the software.
Note: The
pcie0* signals map to PCIe
Controller 0 and pcie1* signals map to PCIe Controller 1 in the port descriptions below.| Port | I/O | Width | Description |
|---|---|---|---|
|
pcie0_cfg_status_pasid_enable |
O |
4 in CPM4 1 in CPM5 |
Configuration PASID Enable: Per Function PASID Enable. Note: In CPM5, only the
Function 0 setting is indicated. For subsequent functions, the
cfg_wrreq interface is used.
|
| pcie0_cfg_status_pasid_exec_permission_enable pcie1_cfg_status_pasid_exec_permission_enable | O |
4 in CPM4 1 in CPM5 |
Configuration PASID Exec Permission Enable: Per Function PASID Exec
Permission Enable. Note: In
CPM5, only the Function 0 setting is indicated. For subsequent
functions, the cfg_wrreq interface is used.
|
| pcie0_cfg_status_pasid_privil_mode_enable pcie1_cfg_status_pasid_privil_mode_enable | O |
4 in CPM4 1 in CPM5 |
Configuration PASID Privil Mode Enable: Per Function PASID Privil Mode
Enable. Note: In CPM5,
only the Function 0 setting is indicated. For subsequent
functions, the cfg_wrreq interface is used.
|
|
pcie0_cfg_status_pasid_control pcie1_cfg_status_pasid_control |
O | 12 in CPM4, 48 in CPM5 | Reserved |
|
pcie0_cfg_status_max_pasid_width_control pcie1_cfg_status_max_pasid_width_control |
O | 20 in CPM4, 80 in CPM5 | Reserved |