Statistics and Control AXI4-Lite Slave Interface Parameters - 5.0 English

System Cache LogiCORE IP Product Guide (PG118)
Document ID
PG118
Release Date
2021-11-05
Version
5.0 English
Table 1. Statistics and Control AXI4-Lite Slave Interface Parameters
Parameter Name Feature/Description Allowable Values Default Value VHDL Type
C_S_AXI_CTRL_BASEADDR Control area base address 0xFFFFFFFF

std_logic_

vector
C_S_AXI_CTRL_HIGHADDR

Control area high address.

Minimum size is 128KB

 0x00000000

std_logic_

vector
C_S_AXI_CTRL_ADDR_WIDTH Address Width 17-64 32 natural
C_S_AXI_CTRL_DATA_WIDTH Data Width 32, 64 32 natural