The Address Translation Cache (ATC) Parameters Tab is shown in the following figure.
Figure 1. ATC Parameters Tab
- Enable Address Translation
- Enable support for Address Translation Cache (ATC) with the PCIe Address Translation Service (ATS). The default is None.
- ATS0 Data Width
- AXI4-Stream interface data width. Set this value to match the PCIe AXI4-Stream interface.
- ATS0 CQ and CC Alignment Mode
- AXI4-Stream CQ and CC interface alignment mode. Set this value to DWORD or Address aligned to match the PCIe AXI4-Stream interface.
- ATS0 RQ and RC Alignment Mode
- AXI4-Stream RQ and RC interface alignment mode. Set this value to DWORD or Address aligned to match the PCIe AXI4-Stream interface.
- ATS0 CQ and CC Frame Straddle
- AXI4-Stream CQ and CC interface frame straddle when using 512-bit data width, or 1024 bit data width for Versal Premium devices, and DWORD alignment. Enable this to match the PCIe AXI4-Stream interface. Allows up to four packets to be transferred in the same beat on CQ and CC with Versal Premium devices.
- ATS0 RC Frame Straddle
- AXI4-Stream RC interface frame straddle. Enable this to match the PCIe AXI4-Stream interface. Used with 256-bit data width and DWORD alignment. Allows up to two packets to be transferred in the same beat.
- ATS0 RQ and RC Frame Straddle
- AXI4-Stream RQ and RC interface frame straddle. Enable this to match the PCIe AXI4-Stream interface. Used with 512-bit, data width or 1024 bit data width for Versal Premium devices and DWORD alignment. Allows up to four packets, or eight packets with Versal Premium devices, to be transferred in the same beat on RC. Allows up to two packets, or four packets on Versal Premium devices, to be transferred in the same beat on RQ. Not visible in the previous figure.
- ATS0 PASID Mode
- Enable handling of PCIe Process Address Space ID (PASID). ATC uses PASID unique translation mapping and global, PASID independent, invalidation. Multiple unique ATC translations and PCIe host relations to PASID requests must be handled by other means. PASID mode is only selectable if the target technology supports the feature and it is activated with support by the host and accelerators.
- ATS0 Parity
- Enable parity on AXI4-Stream interfaces. Set to GENERATE to generate parity. Set to GENERATE CHECK to generate and check parity. This is independent of the integrity setting, and only applies to AXI4-Stream parity. If parity checking is disabled, packets with parity errors will be consumed unless they have other errors.
- ATS0 PRI Timeout Limit
- Define the timeout limit for PCIe Page Request Interface (PRI). Setting the value to 0 disables the timeout.