Cache Lines - 5.0 English

System Cache LogiCORE IP Product Guide (PG118)

Document ID
PG118
Release Date
2021-11-05
Version
5.0 English

The cache size is divided into cache lines, the number of cache lines is determined by cache size (C_CACHE_SIZE) divided by line length in bytes (4 * C_CACHE_LINE_LENGTH). In the System Cache core storage, data inside a cache line is accessed by the offset bits of an address.