CHI Master Port Cache Coherency - 5.0 English

System Cache LogiCORE IP Product Guide (PG118)

Document ID
PG118
Release Date
2021-11-05
Version
5.0 English

When CHI Master Port coherency is selected the Optimized slave ports are disabled. The Generic ports are also limited to a maximum of four ports.

CHI optional Stashing feature is not supported.

CHI DVM feature is not supported. No DVM requests are generated, and SnpDVM is terminated but not acted upon.

CHI Partial Cache States are not supported.