AXI4-Lite Control Interface - 5.0 English

The AXI4-Lite interface is only available when the Control interface is enabled with C_ENABLE_CTRL. Read from a register that does not have all 0s as a default to verify that the interface is functional. Output S_AXI_CTRL_ARREADY asserts when the read address is used, and output S_AXI_CTRL_RVALID asserts when the read data/response is valid. If the interface is unresponsive, ensure that the following conditions are met:

• The ACLK input is connected and toggling.
• The interface is not being held in reset, and ARESETN is an active-Low reset.
• If the simulation has been run, verify in simulation and/or an AMD Vivado™ debugging tool capture that the waveform is correct for accessing the AXI4 interface.