AXI4 Master Interface - 5.0 English

System Cache LogiCORE IP Product Guide (PG118)

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5.0 English

The AXI4 master interface is used to connect the external memory controller. The data width of the interface can be parameterized to match the data width of the AXI4 slave interface on the memory controller. For best performance and resource usage, the parameters on the interface and the Memory Controller should match.

The AXI4 master interface is compliant to the AXI4 interface specification. The interface includes the following features:

  • Support for 32-, 64-, 128-, 256-, and 512-bit data widths
  • Generates the following AXI4 burst types and sizes
    • 2 - 16 beats for WRAP bursts
    • 1 - 64 beats for INCR burst
  • AXI4 user signals are not provided
  • A single thread ID value is generated