| Parameter Name | Feature/Description |
Allowable Values |
Default Value |
VHDL Type |
|---|---|---|---|---|
| C_CXS0_DATA_FLIT_WIDTH | Flit Data Width | 256, 512, 1024 | 256 | natural |
| C_CXS0_RX_CREDIT_LIMIT 1 | Receiver credit limit | 1 - 255 | 15 | natural |
| C_CXS0_MAX_PKT_PER_FLIT 1 | Packets per flit | 2, 3, 4 | 2 | natural |
| C_CXS0_ERROR_FULL_DATA 1 | Full packet length violation error. Unused. | 0, 1 | 0 | natural |
| C_CXS0_CONTINUOUS_DATA 1 | Continuous data. Unused. | 0, 1 | 0 | natural |
| C_CXS0_REPLICATION 1 | Flow signal replication. Unused | NONE, DUPLICATE, TRIPLICATE | NONE | string |
| C_CXS0_DATACHECK 1 | Data & control integrity: | NONE, PARITY, SECDED | NONE | string |
| C_CCIX0_PKT_HEADER | CCIX Packet Header: 0 - Compatible 1 - Optimized |
0, 1 | 0 | natural |
| C_CCIX0_NO_MESSAGE_PACK | Do not allow CCIX message packing | 0, 1 | 1 | natural |
| C_CCIX0_NO_COMP_ACK 1 | No completion acknowledge | 0, 1 | 0 | natural |
| C_CCIX0_CACHE_LINE_SIZE 1 | Cache line size | 64, 128 | 64 | natural |
| C_CCIX0_ADDR_WIDTH 1 | Address width | 48 - 64 | 48 | natural |
| C_CCIX0_MAX_PACKET_SIZE 1 | Maximum packet size | 128, 256, 512, 1024 | 128 | natural |
| C_MSG_CHAIN_LENGTH 1 | Message chain length | 1, 2, 3, 4 | 1 | natural |
| C_COHERENT_ID_WIDTH 1 | Coherent ID width | 6 - 11 | 6 | natural |
| C_DYNAMIC_PORT_PROPERTY_OVERRIDE 1 | Dynamic change AXI override | 0, 1 | 0 | natural |
| C_DEFAULT_REQx_ID 1 2 | Requester ID | 0 | 0 | natural |
| C_NUM_SAM_ENTRIES | Number of SAM entries | 1 - 32 | 1 | natural |
| C_SAM_VALID | SAM entry valid | 0, 1 | 0 | natural |
| C_SAM_ID | SAM identifier | 0 - 2047 | 0 | natural |
| C_SAM_BASEADDR | SAM base address | 0xFFFF FFFF FFFF FFFF | std_logic_vector | |
| C_SAM_HIGHADDR | SAM high address or mask | 0x0000 0000 0000 0000 | std_logic_vector | |
|
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