ATS Interface - 5.0 English

System Cache LogiCORE IP Product Guide (PG118)

Document ID
PG118
Release Date
2021-11-05
Version
5.0 English
Table 1. ATS Interface Parameters
Parameter Name Feature/Description

Allowable Values

Default Value

VHDL Type

C_ATC_SIZE 1 Address Translation Table Size 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384 256 natural
C_ATS0_DATA_WIDTH Data Width 256, 512, 1024 256 natural
C_ATS0_CQ_CC_ALIGNMENT_MODE CQ/CC alignment mode:

0 - DWORD Aligned

1 - Address Aligned

0, 1 0 natural
C_ATS0_RQ_RC_ALIGNMENT_MODE RQ/RC alignment mode:

0 - DWORD Aligned

1 - Address Aligned

0, 1 0 natural
C_ATS0_CQ_CC_STRADDLE CQ/CC frame straddle 0, 1 0 natural
C_ATS0_RQ_RC_STRADDLE RC or RQ/RC frame straddle 0, 1 1 natural
C_ATS0_PASID_MODE PASID mode 0, 1 0 natural
C_ATS0_PARITY Parity:

0 - None

1 - Generate

2 - Generate Check

0, 1, 2 0 natural
C_ATS0_PRI_TIMEOUT_LIMIT PRI timeout limit (ms) 0 - 8191 10 natural
C_ATS0_CQ_TUSER_WIDTH 1 CQ TUSER width. Automatically assigned. 88, 108, 183, 229, 465 88 natural
C_ATS0_CC_TUSER_WIDTH 1 CC TUSER width. Automatically assigned. 33, 81, 165 33 natural
C_ATS0_RQ_TUSER_WIDTH 1 RQ TUSER width. Automatically assigned. 62, 85, 137, 183, 373 62 natural
C_ATS0_RC_TUSER_WIDTH 1 RC TUSER width. Automatically assigned. 75, 161, 337 75 natural
C_ATS0_CQ_CC_ENABLE_AER 1 Enable Completer Channels AER 0, 1 1 natural
C_ATS0_RQ_RC_ENABLE_AER 1 Enable Requester Channels AER 0, 1 0 natural
  1. Not available in the Customize IP dialog box. Allowable values are technology dependent.