The most common case is when the System Cache core is connected to one memory controller. In this case the System Cache core should have the exact same address range as the memory controller. An example with single memory controller is shown in the following figure.
Figure 1. Single Memory Controller Configuration
When the System Cache core is connected to multiple slaves it normally has an address range that spans the complete range of all the slaves. Depending on how many slaves there are and their individual address ranges this could leave holes in the address map, which the software designer must be aware of to avoid program issues. An example with a dual memory controller having a hidden address hole is shown in the following figure.
Figure 2. Dual Memory Controller Configuration with Hole
