CHI Interface - 5.0 English

System Cache LogiCORE IP Product Guide (PG118)

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5.0 English

In the CHI case, traffic is transmitted on six channels that are grouped into Tx and Rx links with three channels each. Some additional signals are also used to handle link status and system coherency.

Active FLITs on all channels are qualified with a valid signal, for example M0_CHI_TXREQFLITV for M0_CHI_TXREQFLIT in case of the request channel. Channels receive the credits with a dedicated signal, which is called M0_CHI_TXREQLCRDV in the request example.

Before debugging a channel, verify that the corresponding Link is in RUN state, i.e. M0_CHI_TXLINKACTIVEREQ and M0_CHI_TXLINKACTIVEACK are set to 1.

For coherent traffic the system coherency should be in RUN state with both M0_CHI_SYSCOREQ and M0_CHI_SYSCOACK set to 1.

For more details on CHI behavior and FLIT bit mapping, see ArmĀ® AMBA 5 CHI Architecture Specification (ARM IHI 0050B).