Optimized Port Cache Coherency - 5.0 English

System Cache LogiCORE IP Product Guide (PG118)

Document ID
PG118
Release Date
2021-11-05
Version
5.0 English

Enable optimized port cache coherency when a MicroBlazeâ„¢ multi-processor system is expected to work on the same data, and hardware support for cache coherence is desired for efficiency and safety. This handles all coherency support that is required for branch target cache and MMU as well as instruction and data caches. Without the hardware cache coherency support all this has to be handled through software.