XIP Mode Example Design Behavior - 3.2 English - PG153

AXI Quad SPI LogiCORE IP Product Guide (PG153)

Document ID
PG153
Release Date
2025-01-21
Version
3.2 English

In the XIP mode, the core has built-in commands as per the mode chosen. The memory model is pre-configured with the data and the same data is read by the core when a transaction is initiated.