Legacy Mode and Performance Mode Example Design Behavior - 3.2 English - PG153

AXI Quad SPI LogiCORE IP Product Guide (PG153)

Document ID
PG153
Release Date
2025-01-21
Version
3.2 English

For Standard SPI mode, Dual, and Quad SPI mode, the core and the memory model have predefined commands. The standard page program command (0x02h ) is used for writing the data in the memory model when the FIFO is enabled in the design. In case of a read from memory model, the commands are chosen based on the SPI mode of the core.