Write DQS to DQ Deskew - 1.1 English

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2024-08-09
Version
1.1 English
Note: These calibration stages are skipped for data rates below 1,600 Mb/s.
Write DQS to DQ calibration is required to center align the write DQS in the write DQ window per bit. At the start of Write DQS Centering and Per-Bit Deskew, DQS is aligned to CK but no adjustments on the write window have been made. Write window adjustments are made in the following two sequential stages:
  1. Write Per-Bit Deskew
  2. Write DQS Centering