DDR4 Pinout for Multi-Rank L/RDIMM Interfaces (Non-Flipped) - 1.0 English

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.0 LogiCORE IP Product Guide (PG313)

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1.0 English
Nibble utilization for 72-bit, Multi-Rank L/RDIMM with ECC in the non-flipped configuration is shown in the following figure. DQ indicates a data nibble, AC indicates an Address/Command/Control nibble, sys_clk indicates a nibble comprising the System Clock pair, RESET_n, and ALERT_n.
Important: The nibble utilization figure is based on the fixed pinout output by Vivado for this configuration.
Figure 1. Nibble Utilization for 72-bit Multi-rank L/RDIMM with ECC (Non-flipped)