SSID Effect in Memory Interleaving - 1.1 English

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2024-08-09
Version
1.1 English

An important attribute of the NoC is that the NMU includes a 2 KB read reorder buffer and each read transaction is tagged with a unique tag which allows the transactions to be executed and returned out of order, thereby improving performance in various ways. One of those ways is avoiding the SSID effect seen previously. However, the same does not apply to write transactions. The NoC NMU does not tag or reorder writes, and the SSID rule is applied. Since MC interleaving involves sending transactions to two or four slaves concurrently, SSID may become a factor limiting write performance if transactions share the same ID or a limited number of IDs.