ECC Enabled Interfaces - 1.1 English

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2024-08-09
Version
1.1 English

When ECC is enabled then an additional data byte will be generated in the DDRMC. The ECC byte includes 8-bits of data, a DQS pair, and a DM/DBI pin for x8 or x16 devices. If future hardware designs will be using ECC, then the pinout must be generated with ECC enabled. During hardware layout ensure these are routed to the correct locations on the board. When running in application the ECC function can be disabled and hardware will operate correctly as the ECC byte is a functional "don’t care".