Simulating the Design - 1.1 English

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)
Document ID
PG313
Release Date
2024-11-13
Version
1.1 English
  • Details on building a design and running simulation are provide in the tutorial available on GitHub.
  • Details on building an HBM design and running simulation are provided in the tutorial available on GitHub.
  • Initializing HBM simulation model with backdoor loading is supported. Details on backdoor loading is provided in AR000035845.