Power Down and Self-Refresh - 1.0 English

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.0 LogiCORE IP Product Guide (PG313)

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1.0 English

The HBM memory channel can be placed into Power Down mode or Self-Refresh mode after a period of inactivity. The option for entering Power Down mode includes a configurable value for idle memory clock cycles. After this number of consecutive idle cycles has been met, the HBM Controller will place the HBM channel into Power Down. To ensure data retention, the HBM Controller will periodically exit power-down mode to issue refresh commands and reenter power-down mode again.

Self-Refresh mode is entered after a multiple of the idle clock cycles has passed. This multiple can be 1, 2, 4, or 8. If the multiple is 1, when the idle count is reached, instead of entering Power Down mode the Memory Controller will place the HBM channel into Self-Refresh. If the value is greater than 1, the HBM channel will be in Power Down mode first, then later move into Self-Refresh once the idle cycle condition is met.

For example, if Power Down and Self-Refresh are both enabled, with idle time set to 4,096 and Self-Refresh set to 4x, then after 4096 idle cycles the channel would enter Power Down. Then (4,096 x 4 – 4,096) 12,288 idle cycles after that, the channel would enter Self-Refresh.