HBM Reliability Options Tab - 1.1 English

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2024-11-13
Version
1.1 English

The HBM Reliability Options tab is shown in the following figure.

Figure 1. HBM Reliability Options Tab

ECC Options

Enable ECC Correction
Automatically generate and store ECC data with all writes and check during readback.
Enable ECC Scrubbing
When enabled, the selected address range is periodically scrubbed to correct and rewrite any 1-bit ECC errors detected.
Initialize Memory Using ECC (Zeroization of Memory)
When enabled, initializes memory with valid ECC values.
Scrub Start/End Address for PC0/PC1
Used to define the address range for which the on-the-fly scrubbing of detected ECC errors occurs. Addresses are defined per pseudo channel, and are relative to the base address of the given pseudo channel.
Scrub Interval(hrs) for PC0/PC1
The interval, in hours, at which the memory range is scrubbed. The default frequency is once every 24 hours.
Write data mask
Write data mask is available when ECC is disabled.
Note: While ECC correction can be enabled without initialization, you must ensure that no reads are issued to an address that has not been written to first.

Parity options

Command Parity
Enable parity checks for the command bus.
Write Data Parity
Enable parity checks for the write data.
Read Data Parity
Enable parity checks for read data.

DBI Options

Read DBI
Enable Dynamic Bus Inversion for read data.
Write DBI
Enable Dynamic Bus Inversion for write data.