HBM Configuration Tab - HBM Configuration Tab - 1.1 English - PG313

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2026-06-10
Version
1.1 English

Enabling an HBM controller adds the HBM Configuration tab. The following figure shows the HBM Configuration tab.

Figure 1. HBM Configuration Tab

Configure all Channels to Same Value?
Select Yes to configure all memory controllers to use the same settings. Select No to configure memory controller options independently.
HBM Clock
Select between internal clock (HSM0) or the external clock pins for the HBM. If the external clock source is selected, you need to select the IO standard for the reference clock. The supported IO standards are LVDS for differential clock and LVCMOS for Single-ended clock.
HBM Memory Frequency for Stack
Select the operating frequency of the HBM. HBM operates in Double data rate mode and hence the actual data rate is double the frequency set in this option.
HBM Reference Frequency for Stack
Select the frequency provided to the reference clock port. Internal clock has a range of 100-200 MHz and the external clock has a range of 100-500 MHz.
Configure Channels
Clicking this button launches a Configure Channels dialog box. The new dialog box has the following three tabs:
  • HBM Address Map Options
  • HBM Refresh and Power Savings Options
  • HBM Reliability Options