| Byte Offset | Bit | Default | Access Type | Field | Description |
|---|---|---|---|---|---|
| 0x50000 | [31:0] | 0 | RW | addr | MSI-X vector0 message lower address. MSIX_Vector0_Address[63:32] |
| 0x50004 | [31:0] | 0 | RW | addr | MSI-X vector0 message upper address. MSIX_Vector0_Address[63:32] |
| 0x50008 | [31:0] | 0 | RW | data | MSIX_Vector0_Data[31:0] MSI-X vector0 message data. |
| 0x5000C | [31:0] | 0 | RW | control | MSIX_Vector0_Control[31:0] MSI-X vector0 control. Bit Position: 31:1: Reserved. 0: Mask. When set to 1, this MSI-X vector is not used to generate a message. When reset to 0, this MSI-X vector is used to generate a message. |
Note: The table above represents one MSI-X
table entry 0. There are 2K MSI-X table entries for the QDMA.