- 2048 queue sets
- 2048 H2C descriptor rings.
- 2048 C2H descriptor rings.
- 2048 C2H Completion (CMPT) rings.
- Supports both the AXI4 Memory Mapped and
AXI4-Stream interfaces per queue (AXI4-Stream
is not available when CPM4 configured for 16 GTps data rate with x16 lane
width).
- Supports Polling Mode (Status Descriptor Write Back) and Interrupt
Mode.
- Interrupts
- 2048 MSI-X vectors.
- Up to 32 MSI-X vectors per PF, and 8 MSI-X vectors per VF.
- Interrupt aggregation.
- C2H Stream interrupt moderation.
- C2H Stream Completion queue entry coalescence.
- Descriptor and DMA customization through user logic
- Allows custom descriptor format.
- Traffic Management.
- Supports SR-IOV with up to 4 Physical Functions (PF) and 252 Virtual
Functions (VF)
- Thin hypervisor model.
- QID virtualization.
- Allows only privileged/Physical functions to program
contexts and registers.
- Function level reset (FLR) support.
- Mailbox.
- Rich programmability on a per queue basis, such as AXI4 Memory Mapped versus AXI4-Stream interfaces.