C2H Completion Status Structure - 3.4 English

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
Release Date
3.4 English

The C2H completion status is located at the last location of completion ring, that is, Completion Ring Base Address + (Size of the completion length (8,16,32) * (Completion Ring Size – 1)).

When C2H Streaming Completion is enabled, after the packet is transferred, CMPT entry and CMPT status are written to C2H Completion ring. PIDX in the Completion status can be used to indicate the currently available completion to be processed.

Table 1. AXI4-Stream C2H Completion Status Structure
Bit Bit Width Field Name Description
[63:35] 29 Reserve Reserved
[34:33] 2 int_state Interrupt State.

0: ISR


[32] 1 color Color status bit
[31:16] 16 cidx Consumer Index (RO)
[15:0] 16 pidx Producer Index