C2H Completion Entry Structure - 3.4 English

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2024-11-22
Version
3.4 English

The following is the C2H Completion ring entry structure for User format when the data format bit is set to 1’b1.

Table 1. C2H Completion Entry User Format Structure
Name Size Index

User defined bits for 32 Bytes settings

252 bits

[255:4]

User defined bits for 16 Bytes settings

124 bits

[127:4]

User defined bits for 8 Bytes settings

60 bits [63:4]
desc_used 1 [3:3]
err 1 [2:2]
color 1 [1:1]
Data format 1 [0:0]

The following is the C2H Completion ring entry structure for Standard format when the data format bit is set to 1’b0.

Table 2. C2H Completion Entry Standard Format Structure
Name Size Index

User defined bits for 32 Bytes settings

236 bits [255:20]

User defined bits for 16 Bytes settings

108 bits

[127:20]

User defined bits for 8 Bytes settings

44 bits [63:20]
Len 16 [19:4]
desc_used 1 [3:3]
err 1 [2:2]
color 1 [1:1]
Data format 1 [0:0]