Configuration transactions are non-posted transactions. The AXI Bridge
functional mode has a timer for timeout termination
of configuration transactions that have not completed on the PCIe link. SLVERR is returned when a
configuration timeout occurs. Timeouts of configuration transactions are flagged by an
interrupt as well.
Note: Multiple Configuration read (PCIe CFG
read) can block Configuration writes (PCIe CFG write). You must have some kind of
throttling mechanism for CFG reads so CFG write can pass by.