Function Command Register (0x2404) - 3.4 English

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)
Document ID
PG347
Release Date
2024-05-30
Version
3.4 English
Table 1. Function Command Register (0x2404)
Bit Default Access Type Field Description
[31:3] 0 NA Reserved Reserved
[2] 0 RO Reserved Reserved
[1] 0 RW msg_rcv For VF: VF marks the message in its Incoming Mailbox Memory as received. Hardware asserts the acknowledgement bit of the associated PF.

For PF: PF marks the message send by target_fn as received. The hardware will refresh the i_msg_status of the PF, and clear the o_msg_status of the target_fn.
[0] 0 RW msg_send For VF: VF marks the current message in its own Outgoing Mailbox as valid.

For PF:

  • Current target_fn_id belongs to a VF: PF finished writing a message into the Incoming Mailbox memory of the VF with target_fn_id. The hardware sets the i_msg_status field of the target FN’s status register.
  • Current target_fn_id belongs to a PF: PF finished writing a message into its own outgoing Mailbox memory. Hardware will push the message to the event queue of the PF with target_fn_id.