Example 3 - 3.4 English

This example shows the generic settings to set up two independent BARs for PCIe® and address translation of addresses for PCIe to a remote AXI address space. This setting of BARs for PCIe does not depend on the AXI BARs within the bridge.

In this example, number of PCIe BAR are two, the following range assignments are made.

Aperture_Base_Address_0 =0x00000000_12340000
Aperture_High_Address_0 =0x00000000_1234FFFF (64 KB)
AXI_to_PCIe_Translation_0=0x00000000_56710000 (Bits 63-32 are zero to
produce a 32-bit PCIe
TLP. Bits 15-0 must be zero based on the AXI BAR aperture size. Non-zero
values in
the lower 16 bits are invalid translation values.)
Aperture_Base_Address_1 =0x00000000_ABCDE000
Aperture_High_Address_1 =0x00000000_ABCDFFFF (8 KB)
AXI_to_PCIe_Translation_1=0x50000000_FEDC0000 (Bits 63-32 are non-zero to
produce a 64-bit
PCIe TLP. Bits 12-0 must be zero based on the AXI BAR aperture size. Nonzero
values
in the lower 13 bits are invalid translation values.)

• Accessing the Bridge AXI BAR_0 with address 0x0000_12340ABC on the AXI bus yields 0x56710ABC on the bus for PCIe.
• Accessing the Bridge AXI BAR_1 with address 0x0000_ABCDF123 on the AXI bus yields 0x50000000FEDC1123 on the bus for PCIe.