CPM5_QDMA_Dual_Gen4x8_MM_ST_Design - 3.4 English

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2024-11-22
Version
3.4 English

CPM5 Dual Controller QDMA0 and QDMA1 with Gen4x8 AXI4 and AXI4-Stream functional example design:

  • This design has CPM5–QDMA0 and CPM5-QDMA1 enabled in Gen4x8 configuration as an End Point
  • The design targets VPK120 board and it supports Synthesis and Implementation flows
  • Enables each QDMA, AXI4 and QDMA AXI-ST functionality with 4 PF and 252 VFs
  • Capable of exercising AXI4, AXI-ST path, and descriptor bypass

Example design registers are listed under CPM5_QDMA_Gen4x8_MM_ST_Design section.