The XP IOB supports several single-ended standards that typically require an external reference voltage to define the receiver switching threshold levels, known as VREF. In the XP IOB, these thresholds must be internally derived from the VCCO bank voltage, and are automatically assigned to the IOB at a predefined level based on the IOSTANDARD selected for the pins. Pins within the same bank must share compatible VREF levels unless the XPIO_VREF primitive is used. See XP IOB Supported Standards for a list of standards and the associated internal VREF levels.
An optional VREF scan helps fine tune the internal VREF of input buffers to maximize performance. It can be accessed through the IBUFE3 and IOBUFE3 primitives with the XPIO_VREF primitive. Internal VREF tuning controls the VREF on a per-nibble basis. Within a bank, each nibble can have its own variation of a given VREF. Inputs with I/O standards of different VREF specification cannot be placed within the same nibble.The XPIO_VREF primitive must be LOCed
to the appropriate XPIO_VREF site and the VREF_NIB must be set to VREF_FABRIC. The
following XDC commands can be
used:
set_property LOC XPIO_VREF_XnYm [get_cells XPIO_VREF_inst]
set_property VREF_NIB VREF_FABRIC [get_cells XPIO_VREF_inst]