Built-in Self-Calibration

Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010)

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1.5 English

Built-in self-calibration (BISC) calculates delay values for all delay lines. The last step of BISC, voltage and temperature compensation (VTC), automatically tracks and adjusts the delays as voltage and temperature conditions change.

BISC is a three step process:
Alignment (RX Datapath Only)
Alignment maximizes the data eye by removing internal on-die skew between data inputs and compensating for the internal skew between clock and data insertion delays of input paths to the first capture flip-flops (this includes skew caused by inter-nibble and/or inter-byte clocking). These delays, as a singular group, are called align_delay.
Important: BISC does not compensate for external delays, such as differences in trace lengths and package skews, or deskewing outputs signals.
Delay Calibration
Calculates the taps required for delay lines. For each XPHY NIBBLESLICE, delay calibration calculates the number of taps required to provide the delay requested using the DELAY_VALUE_x attribute for input and output delays, and 90° shifts for QTR delays, for a given process, voltage, and temperature condition. align_delay is not included in any calculations.
Voltage and Temperature Compensation
Compensates for voltage and temperature changes. Voltage and temperature compensation (VTC) uses round-robin scheduling to automatically update delays lines based on voltage and temperature drift without interrupting normal operation of the associated XPHY NIBBLESLICE.
Tip: When using inter-byte or inter-nibble clocking, each nibble can require a different amount of time to complete the same BISC step. In this case, the next BISC step cannot be started until all nibbles finish the current step.