HD IOB Supported Standards

Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010)

Document ID: AM010
Release Date: 2024-03-18
Revision: 1.5 English

Table 1. HD IOB Supported Single-Ended Standards
IOSTANDARD	Required V_CCO Level for Input and Output	INTERNAL _VREF Level for Input	DRIVE and Termination Options
LVTTL	3.3V	N/A	DRIVE: 4, 8, 12
LVCMOS33	3.3V	N/A	DRIVE: 4, 8, 12
LVCMOS25	2.5V	N/A	DRIVE: 4, 8, 12
LVCMOS18	1.8V	N/A	DRIVE: 4, 8, 12
SSTL18_I	1.8V	0.9V	SPLIT
HSTL_I_18	1.8V	0.9V	SPLIT

Table 2. HD IOB Supported Differential Standards
IOSTANDARD	V_CCO Level¹	Drive and Termination Options
LVDS_25 (input only)	2.5V
LVPECL (input only)	3.3V
SLVS_400_25 (input only)	2.5V
SUB_LVDS (input only)	1.8V
DIFF_HSTL_I_18	1.8V	SPLIT
DIFF_SSTL18_I	1.8V	SPLIT
When on-die input termination is used (ODT is set to a value other than RTT_NONE) or when PULLTYPE leverages V_CCO (KEEPER or PULLUP), the V_CCO input voltage is as specified. When ODT = RTT_NONE and PULLTYPE is unused, NONE, or PULLDOWN, the V_CCO input voltage is any allowed voltage higher than the highest signal level applied to the pin.